Welcome to Chipyard’s documentation!¶
Chipyard is a framework for designing and evaluating full-system hardware using agile teams. It is composed of a collection of tools and libraries designed to provide an integration between open-source and commercial tools for the development of systems-on-chip. New to Chipyard? Jump to the Chipyard Basics page for more info.
Chipyard is developed and tested on Linux-based systems.
It is possible to use this on macOS or other BSD-based systems, although GNU tools will need to be installed; it is also recommended to install the RISC-V toolchain from
Working under Windows is not recommended.
Setting up the Chipyard Repo¶
Start by fetching Chipyard’s sources. Run:
git clone https://github.com/ucb-bar/chipyard.git cd chipyard ./scripts/init-submodules-no-riscv-tools.sh
This will initialize and checkout all of the necessary git submodules.
Installing the RISC-V Tools¶
We need to install the RISC-V toolchain in order to be able to run RISC-V programs using the Chipyard infrastructure.
This will take about 20-30 minutes. You can expedite the process by setting a
make environment variable to use parallel cores:
To build the toolchains, you should run:
If you are planning to use the Hwacha vector unit, or other RoCC-based accelerators, you should build the esp-tools toolchain by adding the
esp-tools argument to the script above.
If you are running on an Amazon Web Services EC2 instance, intending to use FireSim, you can also use the
--ec2fast flag for an expedited installation of a pre-compiled toolchain.
Finally, set up Chipyard’s environment variables and put the newly built toolchain on your path:
This depends on what you are planning to do with Chipyard.
- If you intend to run a simulation of one of the vanilla Chipyard examples, go to Software RTL Simulation and follow the instructions.
- If you intend to run a simulation of a custom Chipyard SoC Configuration, go to Simulating A Custom Project and follow the instructions.
- If you intend to run a full-system FireSim simulation, go to FPGA-Accelerated Simulation and follow the instructions.
- If you intend to add a new accelerator, go to Customization and follow the instructions.
- If you want to learn about the structure of Chipyard, go to Chipyard Components.
- If you intend to change the generators (BOOM, Rocket, etc) themselves, see Included RTL Generators.
- If you intend to run a tutorial VLSI flow using one of the Chipyard examples, go to ASAP7 Tutorial and follow the instructions.
- If you intend to build a chip using one of the vanilla Chipyard examples, go to Building A Chip and follow the instructions.
If you have a question about Chipyard that isn’t answered by the existing documentation, feel free to ask for help on the Chipyard Google Group.
Table of Contents¶
- 1. Chipyard Basics
- 1.1. Chipyard Components
- 1.2. Development Ecosystem
- 1.3. Configs, Parameters, Mixins, and Everything In Between
- 1.4. Initial Repository Setup
- 2. Simulation
- 2.1. Software RTL Simulation
- 2.2. FPGA-Accelerated Simulation
- 3. Included RTL Generators
- 3.1. Rocket Chip
- 3.2. Rocket Core
- 3.3. Berkeley Out-of-Order Machine (BOOM)
- 3.4. Hwacha
- 3.5. Gemmini
- 3.6. IceNet
- 3.7. Test Chip IP
- 3.8. SiFive Generators
- 3.9. SHA3 RoCC Accelerator
- 3.10. Ariane Core
- 4. Development Tools
- 5. VLSI Flow
- 5.1. Building A Chip
- 5.2. Core Hammer
- 5.3. Configuration (Hammer IR)
- 5.4. Tool Plugins
- 5.5. Technology Plugins
- 5.6. ASAP7 Tutorial
- 5.7. Advanced Usage
- 6. Customization
- 6.1. Heterogeneous SoCs
- 6.2. Integrating Custom Chisel Projects into the Generator Build System
- 6.3. RoCC vs MMIO
- 6.4. Adding a RoCC Accelerator
- 6.5. MMIO Peripherals
- 6.6. Keys, Traits, and Configs
- 6.7. Adding a DMA Device
- 6.8. Incorporating Verilog Blocks
- 6.9. Memory Hierarchy
- 6.10. Chipyard Boot Process
- 6.11. Adding a Firrtl Transform
- 6.12. IOBinders
- 7. Target Software
- 8. Advanced Concepts
- 8.1. Tops, Test-Harnesses, and the Test-Driver
- 8.2. Communicating with the DUT
- 8.3. Debugging RTL
- 8.4. Accessing Scala Resources
- 8.5. Context-Dependent-Environments
- 9. TileLink and Diplomacy Reference
- 9.1. TileLink Node Types
- 9.2. Diplomacy Connectors
- 9.3. TileLink Edge Object Methods
- 9.4. Register Router
- 9.5. Diplomatic Widgets
- 9.5.1. TLBuffer
- 9.5.2. AXI4Buffer
- 9.5.3. AXI4UserYanker
- 9.5.4. AXI4Deinterleaver
- 9.5.5. TLFragmenter
- 9.5.6. AXI4Fragmenter
- 9.5.7. TLSourceShrinker
- 9.5.8. AXI4IdIndexer
- 9.5.9. TLWidthWidget
- 9.5.10. TLFIFOFixer
- 9.5.11. TLXbar and AXI4Xbar
- 9.5.12. TLToAXI4 and AXI4ToTL
- 9.5.13. TLROM
- 9.5.14. TLRAM and AXI4RAM