Running a Design on ZCU104

Basic ZCU104 Design

The default Xilinx ZCU104 harness is set up with UART, a SPI SDCard, DDR backing memory, and JTAG. This allows it to run RISC-V Linux from an SDCard while piping the terminal over UART to the host machine. To extend this design, you can create your own Chipyard configuration and add the WithZCU104Tweaks located in fpga/src/main/scala/zcu104/Configs.scala. Adding this config fragment enables and connects the default peripherals to your Chipyard design/config.

class WithZCU104Tweaks(freqMHz: Double = 100) extends Config(
  // clocking
  new chipyard.harness.WithAllClocksFromHarnessClockInstantiator ++
  new chipyard.clocking.WithPassthroughClockGenerator ++
  new chipyard.harness.WithHarnessBinderClockFreqMHz(freqMHz) ++
  new chipyard.config.WithUniformBusFrequencies(freqMHz) ++
  // harness binders
  new WithUART ++
  new WithSPISDCard ++
  new WithDDRMem ++
  new WithJTAG ++
  // other configuration
  new WithDefaultPeripherals ++
  new chipyard.config.WithTLBackingMemory ++ // use TL backing memory
  new WithSystemModifications ++ // setup busses, use sdboot bootrom, setup ext. mem. size
  new freechips.rocketchip.subsystem.WithoutTLMonitors ++
  new freechips.rocketchip.subsystem.WithNMemoryChannels(1)
)

class RocketZCU104Config extends Config(
  new WithZCU104Tweaks ++
  new chipyard.RocketConfig
)

To build the default design (Vivado should be added to the PATH), run:

cd fpga/
make SUB_PROJECT=zcu104 bitstream

Running Linux on ZCU104 Designs

The ZCU104 uses the same SD boot flow and flat Linux binaries as the VCU118. Follow Running Linux on VCU118 Designs to build Linux and prepare the SDCard.

UART-TSI No-DDR Design

The RocketZCU104NoDDRConfig uses UART-TSI, disables DDR and the default peripherals, and provides a 256 KiB DTIM at 0x80000000. Build it with:

cd fpga/
make SUB_PROJECT=zcu104 CONFIG=RocketZCU104NoDDRConfig bitstream

Build the UART-based frontend server:

cd generators/testchipip/uart_tsi
make

After programming the bitstream, load a program that fits in the DTIM:

./uart_tsi +tty=/dev/ttyUSBX +selfcheck program.riscv